The present invention relates to an electron beam measurement technique for measuring the shapes or sizes of portions of patterns on a sample, or detecting a defect or the like.
In recent years, a semiconductor element has been miniaturized, and dimensional control with high accuracy has been demanded. With the miniaturization of the semiconductor element, the wavelength of light used in a lithographic process has been reduced. In the most currently advanced factory, an ArF excimer laser (having a wavelength of 193 nm) is used. In order to miniaturize the semiconductor element, an extreme ultraviolet (EUV) lithography using light with a wavelength of 13 nm is considered as a candidate. However, since the wavelength of light used in the EUV lithography is shorter by one digit or more than that of the ArF excimer laser, there is a controversy whether or not it is possible to smoothly switch to the EUV lithography. As an alternative solution, a multi-exposure scheme has been proposed.
As an example of the multi-exposure scheme, a process flow of a double patterning technique (refer to, for example, SEMICONDUCTOR International Web-version: http://www.sijapan.com/issue/2007/04/u3eqp3000001dd9m.html) is shown in FIGS. 1A to 1G. As shown in FIG. 1A, a substrate W has a processed layer TL, a hard mask layer HM and a first resist layer RL1. The hard mask layer HM is provided on the processed layer TL. The first resist layer RL1 is provided on the hard mask layer HM.
In a first exposure, a first exposure pattern EP1 is delineated in the first resist layer RL1 by an exposure apparatus (as shown FIG. 1B) and developed (as shown in FIG. 1C). Next, the hard mask layer HM is etched such that the first pattern is transferred into the hard mask layer HM as shown in FIG. 1D.
Then, an antireflection film BARC is formed in order to perform a second exposure. After that, a second resist layer RL2 is formed (as shown in FIG. 1E). The second exposure is performed by using an appropriate reticle in the same way as the first exposure such that a second exposure pattern EP2 is delineated in the second resist layer RL2 (as shown in FIG. 1E) and developed (as shown in FIG. 1F). A portion of the second exposure pattern EP2 is located between portions of the first exposure pattern EP1. This makes it possible to delineate a fine pattern (that cannot be delineated by a single exposure due to a lack of resolution) in a single layer.
Next, the processed layer TL is etched using the second resist layer RL2, the antireflection film BARC, and the hard mask layer HM as masks. Then, the second resist layer RL 2 and the antireflection film BARC are peeled off. A pattern of the processed layer TL is formed as shown in FIG. 1G. In this case, the hard mask layer HM is typically not removed. The wafer is inspected in this state (shown in FIG. 1G).